The P. R. China patents CN200910049783.1, CN200910048198.X and CN200910045186.1 describe a novel method to implement any point DFT in hardware, which consists of the following main components.
1. Preprocessing unit. Its functionalities include cyclic reconstruction, sample rate conversion which can be further realized by low pass polyphase filter and linear interpolator.
2. FFT unit. It can be applied to get DFT results of 2^n or 3*2^n point input data.
3. Postprocessing, unit. It is used to do frequency compensation for the low pass filter used in sample rate conversion, and some index re-ordering and mapping functions such as bit reverse combined with sub-carrier mapping.
As to the details, please refer to the texts of these patents listed below. Be aware that all these patents are written in Chinese.
1. Preprocessing unit. Its functionalities include cyclic reconstruction, sample rate conversion which can be further realized by low pass polyphase filter and linear interpolator.
2. FFT unit. It can be applied to get DFT results of 2^n or 3*2^n point input data.
3. Postprocessing, unit. It is used to do frequency compensation for the low pass filter used in sample rate conversion, and some index re-ordering and mapping functions such as bit reverse combined with sub-carrier mapping.
As to the details, please refer to the texts of these patents listed below. Be aware that all these patents are written in Chinese.